PIC18LF24K Datasheet, PDF (463/594 Pages) –

PIC18(L)F26/45/46K40
32.2 Register Definitions: Comparator Control
Long bit name prefixes for the Comparators are shown
in Table 32-1. Refer to Section 1.4.2.2 “Long Bit
Names” for more information.
TABLE 32-1:
Peripheral
Bit Name Prefix
C1
C1
C2
C2
REGISTER 32-1: CMxCON0: COMPARATOR x CONTROL REGISTER 0
R/W-0/0
R-0/0
U-0
R/W-0/0
U-0
U-1
EN
OUT
—
POL
—
—
bit 7
R/W-0/0
HYS
R/W-0/0
SYNC
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
EN: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled and consumes no active power
bit 6
OUT: Comparator Output bit
If POL = 0 (non-inverted polarity):
1 = CxVP > CxVN
0 = CxVP < CxVN
If POL = 1 (inverted polarity):
1 = CxVP < CxVN
0 = CxVP > CxVN
bit 5
Unimplemented: Read as ‘0’
bit 4
POL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
bit 3
Unimplemented: Read as ‘0’
bit 2
Unimplemented: Read as ‘1’
bit 1
HYS: Comparator Hysteresis Enable bit
1 = Comparator hysteresis enabled
0 = Comparator hysteresis disabled
bit 0
SYNC: Comparator Output Synchronous Mode bit
1 = Comparator output to Timer1/3/5 and I/O pin is synchronous to changes on Timer1 clock source.
0 = Comparator output to Timer1/3/5 and I/O pin is asynchronous
Output updated on the falling edge of Timer1/3/5 clock source.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 463