PIC18LF24K Datasheet, PDF (107/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 10-5: REGISTER FILE SUMMARY FOR PIC18(L)F26/45/46K40 DEVICES (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
FE2h
FSR1H
—
—
—
—
Indirect Data Memory Address Pointer 1 High
FE1h
FSR1L
Indirect Data Memory Address Pointer 1 Low
FE0h
BSR
—
—
—
—
Bank Select Register
FDFh
INDF2
Uses contents of FSR0 to address data memory – value of FSR2 not changed (not a physical register)
FDEh POSTINC2
Uses contents of FSR0 to address data memory – value of FSR2 post-incremented (not a physical register)
FDDh POSTDEC2
Uses contents of FSR0 to address data memory – value of FSR2 post-decremented (not a physical register)
FDCh PREINC2
Uses contents of FSR0 to address data memory – value of FSR2 pre-incremented (not a physical register)
FDBh
FDAh
PLUSW2
FSR2H
Uses contents of FSR0 to address data memory – value of FSR2 pre-incremented (not a physical register) – value of
FSR0 offset by W
—
—
—
—
Indirect Data Memory Address Pointer 2 High
FD9h
FSR2L
Indirect Data Memory Address Pointer 2 Low
FD8h
STATUS
—
TO
PD
N
OV
Z
DC
C
FD7h
PCON0
STKOVF
STKUNF WDTWV
RWDT
RMCLR
RI
POR
BOR
FD6h
T0CON1
T0CS<2:0>
T0ASYNC
T0CKPS<3:0>
FD5h
T0CON0
T0EN
—
T0OUT
T016BIT
T0OUTPS<3:0>
FD4h
TMR0H
Holding Register for the Most Significant Byte of the 16-bit TMR0 Register
FD3h
TMR0L
Holding Register for the Least Significant Byte of the 16-bit TMR0 Register
FD2h
T1CLK
—
—
—
—
CS<3:0>
FD1h
T1GATE
—
—
—
—
GSS<3:0>
FD0h
T1GCON
GE
GPOL
GTM
GSPM
GO/DONE
GVAL
—
—
FCFh
T1CON
—
—
CKPS<1:0>
—
SYNC
RD16
ON
FCEh TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
FCDh TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
FCCh T3CLK
—
—
—
—
CS<3:0>
FCBh T3GATE
—
—
—
—
GSS<3:0>
FCAh T3GCON
GE
GPOL
GTM
GSPM
GO/DONE
GVAL
—
—
FC9h
T3CON
—
—
CKPS<1:0>
—
SYNC
RD16
ON
FC8h
TMR3H
Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
FC7h
TMR3L
Holding Register for the Least Significant Byte of the 16-bit TMR3 Register
FC6h
TMR5CLK
—
—
—
—
CS<3:0>
FC5h
T5GATE
—
—
—
—
GSS<3:0>
FC4h
T5GCON
GE
GPOL
GTM
GSPM
GO/DONE
GVAL
—
—
FC3h
T5CON
—
—
CKPS<1:0>
—
SYNC
RD16
ON
FC2h
TMR5H
Holding Register for the Most Significant Byte of the 16-bit TMR5 Register
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
Not available on LF devices.
Not available on PIC18(L)F26K40 (28-pin variants).
Not available on PIC18(L)F45K40 devices.
Value on
POR, BOR
----xxxx
xxxxxxxx
----0000
--------
--------
--------
--------
--------
----xxxx
xxxxxxxx
-1100000
0011110q
00000000
0-000000
11111111
00000000
----0000
----0000
00000x--
--00-000
00000000
00000000
----0000
----0000
00000x--
--00-000
00000000
00000000
----0000
----0000
00000x--
--00-000
00000000
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 107