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PIC18LF24K Datasheet, PDF (214/594 Pages) –
PIC18(L)F26/45/46K40
17.3 Bidirectional Pins
PPS selections for peripherals with bidirectional
signals on a single pin must be made so that the PPS
input and PPS output select the same pin. Peripherals
that have bidirectional signals include:
• EUSART (synchronous operation)
• MSSP (I2C)
• CCP module
Note:
The I2C default input pins are I2C and
SMBus compatible. RB1 and RB2 are
additional pins. RC4 and RC3 are default
MMP1 pins and are SMBus compatible.
Clock and data signals can be routed to
any pin, however pins without I2C
compatibility will operate at standard
TTL/ST logic levels as selected by the
INVLV register.
17.4 PPS Lock
The PPS includes a mode in which all input and output
selections can be locked to prevent inadvertent
changes. PPS selections are locked by setting the
PPSLOCKED bit of the PPSLOCK register. Setting and
clearing this bit requires a special sequence as an extra
precaution against inadvertent changes. Examples of
setting and clearing the PPSLOCKED bit are shown in
Example 17-1.
EXAMPLE 17-1: PPS LOCK SEQUENCE
; Disable interrupts:
BCF
INTCON,GIE
; Bank to PPSLOCK register
BANKSEL PPSLOCK
MOVLB PPSLOCK
MOVLW 55h
; Required sequence, next 4 instructions
MOVWF PPSLOCK
MOVLW AAh
MOVWF PPSLOCK
; Set PPSLOCKED bit to disable writes
; Only a BSF instruction will work
BSF
PPSLOCK,0
; Enable Interrupts
BSF
INTCON,GIE
EXAMPLE 17-2: PPS UNLOCK SEQUENCE
; Disable interrupts:
BCF
INTCON,GIE
; Bank to PPSLOCK register
BANKSEL PPSLOCK
MOVLB PPSLOCK
MOVLW 55h
; Required sequence, next 4 instructions
MOVWF PPSLOCK
MOVLW AAh
MOVWF PPSLOCK
; Clear PPSLOCKED bit to enable writes
; Only a BCF instruction will work
BCF
PPSLOCK,0
; Enable Interrupts
BSF
INTCON,GIE
17.5 PPS One-Way Lock
Using the PPS1WAY Configuration bit, the PPS
settings can be locked in. When this bit is set, the
PPSLOCKED bit can only be cleared and set one time
after a device Reset. This allows for clearing the
PPSLOCKED bit so that the input and output selections
can be made during initialization. When the
PPSLOCKED bit is set after all selections have been
made, it will remain set and cannot be cleared until after
the next device Reset event.
17.6 Operation During Sleep
PPS input and output selections are unaffected by
Sleep.
17.7 Effects of a Reset
A device Power-on-Reset (POR) clears all PPS input
and output selections to their default values. All other
Resets leave the selections unchanged. Default input
selections are shown in the Section “Pin Allocation
Tables”.The PPS one-way is also removed.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 214