PIC18LF24K Datasheet, PDF (186/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-18: IPR0: PERIPHERAL INTERRUPT PRIORITY REGISTER 0
U-0
U-0
R/W-1/1
R/W-1/1
U-0
R/W-1/1
—
—
TMR0IP
IOCIP
—
INT2IP
bit 7
R/W-1/1
INT1IP
R/W-1/1
INT0IP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
TMR0IP: Timer0 Interrupt Priority bit
1 = High priority
0 = Low priority
IOCIP: Interrupt-on-Change Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
INT2IP: External Interrupt 2 Priority bit
1 = High priority
0 = Low priority
INT1IP: External Interrupt 1 Priority bit
1 = High priority
0 = Low priority
INT0IP: External Interrupt 0 Priority bit
1 = High priority
0 = Low priority
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 186