PIC18LF24K Datasheet, PDF (48/594 Pages) –

PIC18(L)F26/45/46K40
4.4.3 CLOCK SWITCH AND SLEEP
If OSCCON1 is written with a new value and the device
is put to Sleep before the switch completes, the switch
will not take place and the device will enter Sleep
mode.
When the device wakes from Sleep and the
CSWHOLD bit is clear, the device will wake with the
‘new’ clock active, and the clock switch interrupt flag bit
(CSWIF) will be set.
When the device wakes from Sleep and the
CSWHOLD bit is set, the device will wake with the ‘old’
clock active and the new clock will be requested again.
FIGURE 4-6:
ORDY
CLOCK SWITCH (CSWHOLD = 0)
OSCCON1
WRITTEN
OSC #1
OSC #2
NOSCR
NOTE 2
CSWIF
NOTE 1
CSWHOLD
USER
CLEAR
Note 1: CSWIF is asserted coincident with NOSCR; interrupt is serviced at OSC#2 speed.
2: The assertion of NOSCR is hidden from the user because it appears only for the duration of the switch.
FIGURE 4-7:
ORDY
CLOCK SWITCH (CSWHOLD = 1)
OSCCON1
WRITTEN
OSC #1
OSC #2
NOSCR
CSWIF
NOTE 1
CSWHOLD
USER
CLEAR
Note 1: CSWIF is asserted coincident with NOSCR, and may be cleared before or after clearing CSWHOLD = 0.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 48