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PIC18LF24K Datasheet, PDF (526/594 Pages) – | |||
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PIC18(L)F26/45/46K40
SUBFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Subtract Literal from FSR
SUBFSR f, k
0 ï£ k ï£ 63
f ï [ 0, 1, 2 ]
FSR(f) â k ï® FSRf
None
1110 1001 ffkk kkkk
The 6-bit literal âkâ is subtracted from
the contents of the FSR specified by
âfâ.
1
1
Q2
Read
register âfâ
Q3
Process
Data
Q4
Write to
destination
Example:
SUBFSR 2, 23h
Before Instruction
FSR2 = 03FFh
After Instruction
FSR2 = 03DCh
SUBULNK Subtract Literal from FSR2 and Return
Syntax:
SUBULNK k
Operands:
0 ï£ k ï£ 63
Operation:
FSR2 â k ï® FSR2
(TOS) ï®ï PC
Status Affected: None
Encoding:
1110 1001 11kk kkkk
Description:
The 6-bit literal âkâ is subtracted from the
contents of the FSR2. A RETURN is then
executed by loading the PC with the TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case of
the SUBFSR instruction, where f = 3 (binary
â11â); it operates only on FSR2.
Words:
1
Cycles:
2
Q Cycle Activity:
Q1
Decode
No
Operation
Q2
Read
register âfâ
No
Operation
Q3
Process
Data
No
Operation
Q4
Write to
destination
No
Operation
Example:
SUBULNK 23h
Before Instruction
FSR2 = 03FFh
PC
= 0100h
After Instruction
FSR2 =
PC
=
03DCh
(TOS)
ï£ 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 526
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