PIC18LF24K Datasheet, PDF (272/594 Pages) –

PIC18(L)F26/45/46K40
FIGURE 21-4:
SIMPLIFIED PWM BLOCK DIAGRAM
Duty cycle registers
CCPRxH CCPRxL
10-bit Latch⁽²⁾
(Not accessible by user)
Comparator
TMR2 Module
TMR2
R ₍₁₎
ERS logic
Comparator
R
Q
S
CCPx_pset
PR2
Rev. 10-000 157C
9/5/201 4
CCPx_out
To Peripherals
set CCPIF
PPS
RxyPPS
CCPx
TRIS Control
Notes:
1. 8-bit timer is concatenated with two bits generated by Fosc or two bits of the internal prescaler to
create 10-bit time-base.
2. The alignment of the 10 bits from the CCPR register is determined by the CCPxFMT bit.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 272