PIC18LF24K Datasheet, PDF (316/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 24-8: CWG1DBR: CWG RISING DEAD-BAND COUNT REGISTER
U-0
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
—
—
DBR<5:0>
bit 7
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
DBR<5:0>: CWG Rising Edge Triggered Dead-Band Count bits
11 1111 = 63-64 CWG clock periods
11 1110 = 62-63 CWG clock periods
.
.
.
00 0010 = 2-3 CWG clock periods
00 0001 = 1-2 CWG clock periods
00 0000 = 0 CWG clock periods. Dead-band generation is bypassed
REGISTER 24-9: CWG1DBF: CWG FALLING DEAD-BAND COUNT REGISTER
U-0
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
—
—
DBF<5:0>
bit 7
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
DBF<5:0>: CWG Falling Edge Triggered Dead-Band Count bits
11 1111 = 63-64 CWG clock periods
11 1110 = 62-63 CWG clock periods
.
.
.
00 0010 = 2-3 CWG clock periods
00 0001 = 1-2 CWG clock periods
00 0000 = 0 CWG clock periods. Dead-band generation is bypassed.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 316