PIC18LF24K Datasheet, PDF (548/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 37-9: PLL SPECIFICATIONS
Standard Operating Conditions (unless otherwise stated) VDD 2.5V
Param
No.
Sym.
Characteristic
Min.
Typ†
Max. Units Conditions
PLL01 FPLLIN PLL Input Frequency Range
4
—
16 MHz
PLL02 FPLLOUT PLL Output Frequency Range
16
—
64 MHz Note 1
PLL03 TPLLST PLL Lock Time from Start-up
—
200
—
s
PLL04 FPLLJIT PLL Output Frequency Stability (Jitter)
-0.25
—
0.25
%
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: The output frequency of the PLL must meet the FOSC requirements listed in Parameter D002.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 548