PIC18LF24K Datasheet, PDF (277/594 Pages) –

PIC18(L)F26/45/46K40
22.0 PULSE-WIDTH MODULATION
(PWM )
The PWM module generates a Pulse-Width Modulated
signal determined by the duty cycle, period, and
resolution that are configured by the following registers:
• PRx
• TxCON
• PWMxDCH
• PWMxDCL
• PWMxCON
Note:
The corresponding TRIS bit must be
cleared to enable the PWM output on the
PWMx pin.
Each PWM module can select the timer source that
controls the module. Each module has an independent
timer selection which can be accessed using the
CCPTMRS register (Register 21-2). Please note that
the PWM mode operation is described with respect to
TMR2 in the following sections.
Figure 22-1 shows a simplified block diagram of PWM
operation.
Figure 22-2 shows a typical waveform of the PWM
signal.
FIGURE 22-1:
SIMPLIFIED PWM BLOCK DIAGRAM
Duty Cycle registers
PWMxDCH
PWMxDCL<7:6>
Latched
(Not visible to user)
Comparator
TMR2 Module
TMR2
(1)
RQ
0
S
Q
1
PWMxOUT
to other peripherals
PPS
RxyPPS
PWMx
Output Polarity (PWMxPOL)
Comparator
PR2
Clear Timer,
PWMx pin and
latch Duty Cycle
Note 1: 8-bit timer is concatenated with the two Least Significant bits of 1/FOSC adjusted by the Timer2 prescaler to
create a 10-bit time base.
FIGURE 22-2:
Period
PWM OUTPUT
Pulse Width
TMR2 = 0
TMR2 = PR2
TMR2 =
PWMxDCH<7:0>:PWMxDCL<7:6>
For a step-by-step procedure on how to set up this
module for PWM operation, refer to Section
22.1.9 “Setup for PWM Operation using PWMx
Pins”.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 277