PIC18LF24K Datasheet, PDF (60/594 Pages) –

PIC18(L)F26/45/46K40
6.2.1 WAKE-UP FROM SLEEP
The device can wake-up from Sleep through one of the
following events:
1. External Reset input on MCLR pin, if enabled
2. BOR Reset, if enabled
3. Low-Power Brown-Out Reset (LPBOR), if
enabled
4. POR Reset
5. Windowed Watchdog Timer, if enabled
6. All interrupt sources except clock switch
interrupt can wake-up the part.
The first five events will cause a device Reset. The last
one event is considered a continuation of program
execution. To determine whether a device Reset or
wake-up event occurred, refer to Section
8.13 “Determining the Cause of a Reset”.
When the SLEEP instruction is being executed, the next
instruction (PC + 2) is prefetched. For the device to
wake-up through an interrupt event, the corresponding
Interrupt Enable bit must be enabled, as well as the
Peripheral Interrupt Enable bit (PEIE = 1), for every
interrupt not in PIR0. Wake-up will occur regardless of
the state of the GIE bit. If the GIE bit is disabled, the
device continues execution at the instruction after the
SLEEP instruction. If the GIE bit is enabled, the device
executes the instruction after the SLEEP instruction, the
device will then call the Interrupt Service Routine. In
cases where the execution of the instruction following
SLEEP is not desirable, the user should have a NOP
after the SLEEP instruction.
The WDT is cleared when the device wakes-up from
Sleep, regardless of the source of wake-up.
Upon a wake from a Sleep event, the core will wait for
a combination of three conditions before beginning
execution. The conditions are:
• PFM Ready
• COSC-Selected Oscillator Ready
• BOR Ready (unless BOR is disabled)
6.2.2 WAKE-UP USING INTERRUPTS
When global interrupts are disabled (GIE cleared) and
any interrupt source, with the exception of the clock
switch interrupt, has both its interrupt enable bit and
interrupt flag bit set, one of the following will occur:
• If the interrupt occurs before the execution of a
SLEEP instruction
- SLEEP instruction will execute as a NOP
- WDT and WDT prescaler will not be cleared
- TO bit of the STATUS register will not be set
- PD bit of the STATUS register will not be
cleared
• If the interrupt occurs during or after the
execution of a SLEEP instruction
- SLEEP instruction will be completely
executed
- Device will immediately wake-up from Sleep
- WDT and WDT prescaler will be cleared
- TO bit of the STATUS register will be set
- PD bit of the STATUS register will be cleared
Even if the flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes. To
determine whether a SLEEP instruction executed, test
the PD bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 60