PIC18LF24K Datasheet, PDF (156/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 13-14: SCANLADRL: SCAN LOW ADDRESS LOW BYTE REGISTER
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
LADR<7:0>^{(1, 2)}
R/W-0/0
R/W-0/0
bit 7
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
LADR<7:0>: Scan Start/Current Address bits^{(1, 2)}
Least Significant bits of the current address to be fetched from, value increments on each fetch of
memory
Note 1: Registers SCANLADRU/H/L form a 22-bit value, but are not guarded for atomic or asynchronous access;
registers should only be read or written while SCANGO = 0 (SCANCON0 register).
2: While SCANGO = 1 (SCANCON0 register), writing to this register is ignored.
REGISTER 13-15: SCANHADRU: SCAN HIGH ADDRESS UPPER BYTE REGISTER
U-0
U-0
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
—
—
HADR<21:16>
bit 7
R/W-1/1
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
HADR<21:16>: Scan End Address bits^{(1, 2)}
Upper bits of the address at the end of the designated scan
Note 1: Registers SCANHADRU/H/L form a 22-bit value but are not guarded for atomic or asynchronous access;
registers should only be read or written while SCANGO = 0 (SCANCON0 register).
2: While SCANGO = 1 (SCANCON0 register), writing to this register is ignored.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 156