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| PIC18LF24K Datasheet, PDF (69/594 Pages) – | |||
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PIC18(L)F26/45/46K40
REGISTER 7-3: PMD2: PMD CONTROL REGISTER 2
U-0
R/W-0/0
R/W-0/0
U-0
U-0
â
DACMD
ADCMD
â
â
bit 7
R/W-0/0
CMP2MD
R/W-0/0
CMP1MD
R/W-0/0
ZCDMD(1)
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
â1â = Bit is set
W = Writable bit
x = Bit is unknown
â0â = Bit is cleared
U = Unimplemented bit, read as â0â
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
Unimplemented: Read as â0â
DACMD: Disable DAC bit
1 = DAC module disabled
0 = DAC module enabled
ADCMD: Disable ADC bit
1 = ADC module disabled
0 = ADC module enabled
Unimplemented: Read as â0â
CMP2MD: Disable Comparator CMP2 bit
1 = CMP2 module disabled
0 = CMP2 module enabled
CMP1MD: Disable Comparator CMP1 bit
1 = CMP1 module disabled
0 = CMP1 module enabled
ZCDMD: Disable Zero-Cross Detect module bit(1)
1 = ZCD module disabled
0 = ZCD module enabled
Note 1: Subject to ZCD bit in CONFIG2H.
ï£ 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 69
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