PIC18LF24K Datasheet, PDF (175/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-7: PIR5: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 5
U-0
U-0
U-0
U-0
U-0
R/W-0/0
R/W-0/0
—
—
—
—
—
TMR5GIF TMR3GIF
bit 7
R/W-0/0
TMR1GIF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
TMR5GIF: TMR5 Gate Interrupt Flag bit
1 = TMR5 gate interrupt occurred (must be cleared in software)
0 = No TMR5 gate occurred
TMR3GIF: TMR3 Gate Interrupt Flag bit
1 = TMR3 gate interrupt occurred (must be cleared in software)
0 = No TMR3 gate occurred
TMR1GIF: TMR1 Gate Interrupt Flag bit
1 = TMR1 gate interrupt occurred (must be cleared in software)
0 = No TMR1 gate occurred
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 175