PIC18LF24K Datasheet, PDF(227/594 Page) –

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PIC18LF24K Datasheet, PDF (227/594 Pages) –

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PIC18(L)F26/45/46K40

FIGURE 19-1:

TIMER1/3/5 BLOCK DIAGRAM

TMRxGATE<3:0>

TxGPPS

PPS

4

0000

TxGSPM

Rev. 10-000018G

8/7/2015

NOTE (5)

1111

TxGPOL

TMRxON

TxGTM

D

Q

CK

Q

R

1

0

Single Pulse

D

Q

TxGVAL

1

Acq. Control

0

Q1

TxGGO/DONE

Interrupt

det

set bit

TMRxGIF

set flag bit

TMRxIF

Tx_overflow

TMRx(2)

TMRxH TMRxL

TxCLK

EN

Q

D

TMRxGE

TMRxON

0

1

To Comparators (6)

Synchronized Clock Input

TxSYNC

TMRxCLK<3:0>

TxCKIPPS

(1)

PPS

4

0000

Note (4)

1111

Prescaler

1,2,4,8

2

TxCKPS<1:0>

Synchronize(3)

det

Fosc/2

Internal

Clock

Sleep

Input

Note 1:

2:

3:

4:

5:

6:

ST Buffer is high speed type when using TxCKIPPS.

TMRx register increments on rising edge.

Synchronize does not operate while in Sleep.

See Register 19-3 for clock source selections.

See Register 19-4 for gate source selection.

Synchronized comparator output should not be used in conjunction with synchronized input clock.

ï£ 2016 Microchip Technology Inc.

Preliminary

DS40001816C-page 227

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