PIC18LF24K Datasheet, PDF (231/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 19-4: TMRxGATE: TIMERx GATE ISM REGISTER
U-0
U-0
U-0
U-0
R/W-0/u
R/W-0/u
R/W-0/u
—
—
—
—
GSS<3:0>
bit 7
R/W-0/u
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
u = unchanged
bit 7-4
bit 3-0
Unimplemented: Read as ‘0’
GSS<3:0>: Timerx Gate Source Selection bits
GSS
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
Timer1
Gate Source
Reserved
ZCDOUT
CMP2OUT
CMP1OUT
PWM4OUT
PWM3OUT
CCP2OUT
CCP1OUT
TMR6OUT (post-scaled)
TMR5 overflow
TMR4OUT (post-scaled)
TMR3 overflow
TMR2OUT (post-scaled)
Reserved
TMR0 overflow
Pin selected by T1GPPS
Timer3
Gate Source
Reserved
ZCDOUT
CMP2OUT
CMP1OUT
PWM4OUT
PWM3OUT
CCP2OUT
CCP1OUT
TMR6OUT (post-scaled)
TMR5 overflow
TMR4OUT (post-scaled)
Reserved
TMR2OUT (post-scaled)
TMR1 overflow
TMR0 overflow
Pin selected by T3GPPS
Timer5
Gate Source
Reserved
ZCDOUT
CMP2OUT
CMP1OUT
PWM4OUT
PWM3OUT
CCP2OUT
CCP1OUT
TMR6OUT (post-scaled)
Reserved
TMR4OUT (post-scaled)
TMR3 overflow
TMR2OUT (post-scaled)
TMR1 overflow
TMR0 overflow
Pin selected by T5GPPS
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 231