PIC18LF24K Datasheet, PDF (381/594 Pages) –

PIC18(L)F26/45/46K40
FIGURE 26-34:
BUS COLLISION DURING START CONDITION (SCL = 0)
SDA = 0, SCL = 1
SDA
TBRG
TBRG
SCL
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
SEN
BCLxIF
SCL = 0 before BRG time-out,
bus collision occurs. Set BCLxIF.
S
’0’
SSPxIF ^{’0’}
SCL = 0 before SDA = 0,
bus collision occurs. Set BCLxIF.
Interrupt cleared
by software
’0’
’0’
FIGURE 26-35: BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA
SDA = ⁰, SCL = 1
Set S
Less than TBRG
TBRG
SDA pulled low by other master.
Reset BRG and assert SDA.
Set SSPxIF
SCL
SEN
BCLxIF
S
SCL pulled low after BRG
time out
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
’0’
S
SSPxIF
SDA = 0, SCL = 1,
set SSPxIF
Interrupts cleared
by software
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 381