PIC18LF24K Datasheet, PDF (289/594 Pages) –

PIC18(L)F26/45/46K40
23.10 Register Definitions: ZCD Control
REGISTER 23-1: ZCDCON: ZERO-CROSS DETECT CONTROL REGISTER
R/W-0/0
U-0
R-x
R/W-0/0
U-0
U-0
R/W-0/0
ZCDSEN
—
ZCDOUT ZCDPOL
—
—
ZCDINTP
bit 7
R/W-0/0
ZCDINTN
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1
bit 0
ZCDSEN: Zero-Cross Detect Software Enable bit
This bit is ignored when ZCDSEN fuse is set.
1= Zero-cross detect is enabled. ZCD pin is forced to output to source and sink current.
0= Zero-cross detect is disabled. ZCD pin operates according to PPS and TRIS controls.
Unimplemented: Read as ‘0’
ZCDOUT: Zero-Cross Detect Data Output bit
ZCDPOL bit = 0:
1 = ZCD pin is sinking current
0 = ZCD pin is sourcing current
ZCDPOL bit = 1:
1 = ZCD pin is sourcing current
0 = ZCD pin is sinking current
ZCDPOL: Zero-Cross Detect Polarity bit
1 = ZCD logic output is inverted
0 = ZCD logic output is not inverted
Unimplemented: Read as ‘0’
ZCDINTP: Zero-Cross Detect Positive-Going Edge Interrupt Enable bit
1 = ZCDIF bit is set on low-to-high ZCD_output transition
0 = ZCDIF bit is unaffected by low-to-high ZCD_output transition
ZCDINTN: Zero-Cross Detect Negative-Going Edge Interrupt Enable bit
1 = ZCDIF bit is set on high-to-low ZCD_output transition
0 = ZCDIF bit is unaffected by high-to-low ZCD_output transition
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 289