PIC18LF24K Datasheet, PDF (59/594 Pages) –

PIC18(L)F26/45/46K40
6.1.2 INTERRUPTS DURING DOZE
If an interrupt occurs and the Recover-On-Interrupt bit
is clear (ROI = 0) at the time of the interrupt, the
Interrupt Service Routine (ISR) continues to execute at
the rate selected by DOZE<2:0>. Interrupt latency is
extended by the DOZE<2:0> ratio.
If an interrupt occurs and the ROI bit is set (ROI = 1) at
the time of the interrupt, the DOZEN bit is cleared and
the CPU executes at full speed. The prefetched instruc-
tion is executed and then the interrupt vector sequence
is executed. In Figure 6-1, the interrupt occurs during
the 2^nd instruction cycle of the Doze period, and imme-
diately brings the CPU out of Doze. If the Doze-On-Exit
(DOE) bit is set (DOE = 1) when the RETFIE operation
is executed, DOZEN is set, and the CPU executes at
the reduced rate based on the DOZE<2:0> ratio.
EXAMPLE 6-1:
DOZE SOFTWARE
EXAMPLE
//Mainline operation
bool somethingToDo = FALSE:
void main()
{
initializeSystem();
// DOZE = 64:1 (for example)
// ROI = 1;
GIE = 1; // enable interrupts
while (1)
{
// If ADC completed, process data
if (somethingToDo)
{
doSomething();
DOZEN = 1; // resume low-power
}
}
}
// Data interrupt handler
void interrupt()
{
// DOZEN = 0 because ROI = 1
if (ADIF)
{
somethingToDo = TRUE;
DOE = 0; // make main() go fast
ADIF = 0;
}
// else check other interrupts...
if (TMR0IF)
{
timerTick++;
DOE = 1; // make main() go slow
TMR0IF = 0;
}
}
6.2 Sleep Mode
Sleep mode is entered by executing the SLEEP
instruction, while the Idle Enable (IDLEN) bit of the
CPUDOZE register is clear (IDLEN = 0).
Upon entering Sleep mode, the following conditions
exist:
1. WDT will be cleared but keeps running if
enabled for operation during Sleep
2. The PD bit of the STATUS register is cleared
(Register 10-2)
3. The TO bit of the STATUS register is set
(Register 10-2)
4. The CPU clock is disabled
5. LFINTOSC, SOSC, HFINTOSC and ADCRC
are unaffected and peripherals using them may
continue operation in Sleep.
6. I/O ports maintain the status they had before
Sleep was executed (driving high, low, or
high-impedance)
7. Resets other than WDT are not affected by
Sleep mode
Refer to individual chapters for more details on
peripheral operation during Sleep.
To minimize current consumption, the following
conditions should be considered:
- I/O pins should not be floating
- External circuitry sinking current from I/O pins
- Internal circuitry sourcing current from I/O
pins
- Current draw from pins with internal weak
pull-ups
- Modules using any oscillator
I/O pins that are high-impedance inputs should be
pulled to VDD or VSS externally to avoid switching
currents caused by floating inputs.
Examples of internal circuitry that might be sourcing
current include modules such as the DAC and FVR
modules. See Section 30.0 “5-Bit Digital-to-Analog
Converter (DAC) Module” and Section 28.0 “Fixed
Voltage Reference (FVR)” for more information on
these modules.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 59