PIC18LF24K Datasheet, PDF (360/594 Pages) –

FIGURE 26-17: I²C SLAVE, 7-BIT ADDRESS, RECEPTION (SEN = 1, AHEN = 1, DHEN = 1)
SDA
R/W = 0
Receiving Address
A7 A6 A5 A4 A3 A2 A1
Master releases
SDA to slave for ACK sequence
ACK
Receive Data
D7 D6 D5 D4 D3 D2 D1 D0
SCL
S
1 23 45 67 8
9
1 23 45 67 8
ACK
9
SSPxIF
BF
ACKDT
CKP
ACKTIM
S
P
Received
address is loaded into
SSPxBUF
Slave software clears
ACKDT to ACK
the received byte
When AHEN = 1;
on the 8th falling edge
of SCL of an address
byte, CKP is cleared
ACKTIM is set by hardware
on 8th falling edge of SCL
Cleared by software
Received data is
available on SSPxBUF
When DHEN = 1;
on the 8th falling edge
of SCL of a received
data byte, CKP is cleared
ACKTIM is cleared by hardware
on 9th rising edge of SCL
Receive Data
D7 D6 D5 D4 D3 D2 D1 D0
1 2 34 5 67 8
SSPxBUF can be
read any time before
next byte is loaded
Slave sends
not ACK
Set by software,
release SCL
ACK
Master sends
Stop condition
9
P
No interrupt after
if not ACK
from Slave
CKP is not cleared
if not ACK