PIC18LF24K Datasheet, PDF (498/594 Pages) –

PIC18(L)F26/45/46K40
CPFSGT
Compare f with W, skip if f > W
Syntax:
CPFSGT f {,a}
Operands:
0  f  255
a  [0,1]
Operation:
(f) –W),
skip if (f) > (W)
(unsigned comparison)
Status Affected:
None
Encoding:
0110 010a ffff ffff
Description:
Compares the contents of data memory
location ‘f’ to the contents of the W by
performing an unsigned subtraction.
IcfotnhteencotsnotefnWtsRoEf _{G‘f’,}atrheegnrtehaetefer _ttchhaendthe
instruction is discarded and a NOP is
executed instead, making this a
2-cycle instruction.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See Sec-
tion 35.2.3 “Byte-Oriented and Bit-
Oriented Instructions in Indexed Lit-
eral Offset Mode” for details.
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
No
operation
If skip:
Q1
Q2
Q3
No
No
No
operation operation operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
No
No
operation operation operation
No
No
No
operation operation operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
CPFSGT REG, 0
NGREATER :
GREATER :
Before Instruction
PC
=
W
=
Address (HERE)
?
After Instruction
If REG
PC
If REG
PC
 W;
= Address (GREATER)
 W;
= Address (NGREATER)
CPFSLT
Compare f with W, skip if f < W
Syntax:
CPFSLT f {,a}
Operands:
0  f  255
a  [0,1]
Operation:
(f) –W),
skip if (f) < (W)
(unsigned comparison)
Status Affected:
None
Encoding:
0110 000a ffff ffff
Description:
Compares the contents of data memory
location ‘f’ to the contents of W by
performing an unsigned subtraction.
If the contents of ‘f’ are less than the
contents of W, then the fetched
instruction is discarded and a NOP is
executed instead, making this a
2-cycle instruction.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Decode
If skip:
Q2
Read
register ‘f’
Q3
Process
Data
Q4
No
operation
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE CPFSLT REG, 1
NLESS :
LESS :
Before Instruction
PC
=
W
=
After Instruction
Address (HERE)
?
If REG
PC
If REG
PC
< W;
= Address (LESS)
 W;
= Address (NLESS)
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 498