PIC18LF24K Datasheet, PDF(550/594 Page) –

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PIC18LF24K Datasheet, PDF (550/594 Pages) –

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PIC18(L)F26/45/46K40

FIGURE 37-8:

RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP

TIMER TIMING

VDD

MCLR

Internal

POR

PWRT

Time-out

OSC

Start-up Time

Internal Reset(1)

Watchdog Timer

Reset(1)

RST04

RST05

I/O pins

Note 1: Asserted low.

RST01

RST02

RST03

RST02

FIGURE 37-9:

VDD

BROWN-OUT RESET TIMING AND CHARACTERISTICS

VBOR

VBOR and VHYST

(Device in Brown-out Reset)

(Device not in Brown-out Reset)

RST08

Reset

(due to BOR)

RST04(1)

Note 1: Only if PWRTE bit in the Configuration Word register is programmed to â1â; 2 ms delay if

PWRTE = 0.

ï£ 2016 Microchip Technology Inc.

Preliminary

DS40001816C-page 550

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