PIC18LF24K Datasheet, PDF (328/594 Pages) –

PIC18(L)F26/45/46K40
25.6 Carrier Source Polarity Select
The signal provided from any selected input source for
the carrier high and carrier low signals can be inverted.
Inverting the signal for the carrier high source is
enabled by setting the MDCHPOL bit of the MDCON1
register. Inverting the signal for the carrier low source is
enabled by setting the MDCLPOL bit of the MDCON1
register.
25.7 Programmable Modulator Data
The MDBIT of the MDCON0 register can be selected
as the source for the modulator signal. This gives the
user the ability to program the value used for modula-
tion.
25.8 Modulated Output Polarity
The modulated output signal provided on the DSM pin
can also be inverted. Inverting the modulated output
signal is enabled by setting the MDOPOL bit of the
MDCON0 register.
25.9 Operation in Sleep Mode
The DSM module is not affected by Sleep mode. The
DSM can still operate during Sleep, if the Carrier and
Modulator input sources are also still operable during
Sleep. Refer to Section 6.0 “Power-Saving Opera-
tion Modes” for more details.
25.10 Effects of a Reset
Upon any device Reset, the DSM module is disabled.
The user’s firmware is responsible for initializing the
module before enabling the output. The registers are
reset to their default values.
25.11 Peripheral Module Disable
The DSM module can be completely disabled using the
PMD module to achieve maximum power saving. The
DSMMD bit of PMD5 (Register 7-6) when set disables
the DSM module completely. When enabled again all
the registers of the DSM module default to POR status.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 328