PIC18LF24K Datasheet, PDF (193/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-25: IPR7: PERIPHERAL INTERRUPT PRIORITY REGISTER 7
R/W-1/1
R/W-1/1
R/W-1/1
U-0
U-0
U-0
U-0
SCANIP
CRCIP
NVMIP
—
—
—
—
bit 7
R/W-1/1
CWG1IP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4-1
bit 0
SCANIP: SCAN Interrupt Priority bit
1 = High priority
0 = Low priority
CRCIP: CRC Interrupt Priority bit
1 = High priority
0 = Low priority
NVMIP: NVM Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
CWG1IP: CWG Interrupt Priority bit
1 = High priority
0 = Low priority
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 193