PIC18LF24K Datasheet, PDF (188/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-20: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1/1
R/W-1/1
U-0
U-0
U-0
U-0
HLVDIP
ZCDIP
—
—
—
—
bit 7
R/W-1/1
C2IP
R/W-1/1
C1IP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-2
bit 1
bit 0
HLVDIP: HLVD Interrupt Priority bit
1 = High priority
0 = Low priority
ZCDIP: Zero-Cross Detect Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
C2IP: Comparator 2 Interrupt Priority bit
1 = High priority
0 = Low priority
C1IP: Comparator 1 Interrupt Priority bit
1 = High priority
0 = Low priority
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 188