PIC18LF24K Datasheet, PDF (66/594 Pages) –

PIC18(L)F26/45/46K40
7.0 PERIPHERAL MODULE
DISABLE (PMD)
Sleep, Idle and Doze modes allow users to
substantially reduce power consumption by slowing or
stopping the CPU clock. Even so, peripheral modules
still remain clocked, and thus, consume some amount
of power. There may be cases where the application
needs what these modes do not provide: the ability to
allocate limited power resources to the CPU while
eliminating power consumption from the peripherals.
The PIC18(L)F2x/4xK40 family addresses this
requirement by allowing peripheral modules to be
selectively enabled or disabled, placing them into the
lowest possible power mode.
For legacy reasons, all modules are ON by default
following any Reset.
7.1 Disabling a Module
Disabling a module has the following effects:
• All clock and control inputs to the module are
suspended; there are no logic transitions, and the
module will not function.
• The module is held in Reset.
• Any SFR becomes “unimplemented”
- Writing is disabled
- Reading returns 00h
• I/O functionality is prioritized as per Section 15.1,
I/O Priorities
• All associated Input Selection registers are also
disabled
7.2 Enabling a Module
When the PMD register bit is cleared, the module is
re-enabled and will be in its Reset state (Power-on
Reset). SFR data will reflect the POR Reset values.
Depending on the module, it may take up to one full
instruction cycle for the module to become active.
There should be no interaction with the module
(e.g., writing to registers) for at least one instruction
after it has been re-enabled.
7.3 Effects of a Reset
Following any Reset, each control bit is set to ‘0’,
enabling all modules.
7.4 System Clock Disable
Setting SYSCMD (PMD0, Register 7-1) disables the
system clock (FOSC) distribution network to the
peripherals. Not all peripherals make use of SYSCLK,
so not all peripherals are affected. Refer to the specific
peripheral description to see if it will be affected by this
bit.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 66