PIC18LF24K Datasheet, PDF (187/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-19: IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
R/W-1/1
R/W-1/1
U-0
U-0
U-0
U-0
OSCFIP
CSWIP
—
—
—
—
bit 7
R/W-1/1
ADTIP
R/W-1/1
ADIP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-2
bit 1
bit 0
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
CSWIP: Clock-Switch Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
ADTIP: ADC Threshold Interrupt Priority bit
1 = High priority
0 = Low priority
ADIP: ADC Interrupt Priority bit
1 = High priority
0 = Low priority
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 187