PIC18LF24K Datasheet, PDF(8/594 Page) –

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

PIC18LF24K Datasheet, PDF (8/594 Pages) –

◁

TABLE 1: 28-PIN ALLOCATION TABLE (PIC18(L)F26K40) (CONTINUED)

I/O(2)

RC0

RC1

RC2

RC3

RC4

RC5

RC6

RC7

RE3

VSS

VDD

VSS

OUT(2)

Note 1:

2:

3:

4:

11

8

ANC0

â

12

9

ANC1

â

13

10

ANC2

â

14

11

ANC3

â

15

12

ANC4

â

16

13

ANC5

â

17

14

ANC6

â

18

15

ANC7

â

â

T1CKI(1)

â

â

â

IOCC0

â

â

T3CKI(1)

T3G(1)

â

â

CCP2(1)

â

â

IOCC1

â

â

â

T5CKI(1) CCP1(1)

â

â

IOCC2

â

â

â

T2AIN(1)

â

â

â

IOCC3

â

â

â

â

â

â

T4AIN(1)

â

â

â

â

â

â

â

â

â

IOCC4

â

â

â

â

IOCC5

â

â

â

â

IOCC6

CK1(1)

â

â

â

IOCC7 RX1/DT1(1)

â

â

â

â

SCK1(1)

SCL1(3,4)

SDI1(1)

SDA1(3,4)

â

â

â

Y

SOSCO

Y

SOSCIN

SOSCI

Y

â

Y

â

Y

â

Y

â

Y

â

Y

â

1

26

â

â

â

â

â

â

â

IOCE3

â

â

â

Y VPP/MCLR

19

16

â

â

â

â

â

â

â

â

â

â

â

â

VSS

20

17

â

â

â

â

â

â

â

â

â

â

â

â

VDD

8

5

â

â

â

â

â

â

â

â

â

â

â

â

VSS

â

â

ADGRDA

â

ADGRDB

C1OUT

C2OUT

TMR0

CCP1 CWG1A â

CCP2 CWG1B

PWM3 CWG1C

PWM4 CWG1D

â

TX1/CK1(3)

DT1(3)

TX2/CK2(3)

DT2(3)

DSM

SDO1

SCK1

SDO2

SCK2

â

â

Default peripheral input. Input can be moved to any other pin with the PPS input selection registers (Register 17-1).

All pin outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.

These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.

These pins are configured for I2C logic levels; The SCLx/SDAx signals may be assigned to any of these pins. PPS assignments to the other pins (e.g., RB1) will operate, but input logic levels will be

standard TTL/ST as selected by the INLVL register, instead of the I2C specific or SMBus input buffer thresholds.

▷