PIC18LF24K Datasheet, PDF (276/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 21-5: SUMMARY OF REGISTERS ASSOCIATED WITH CCPx
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE/GIEH PEIE/GIEL
IPEN
—
—
INT2EDG
INT1EDG
INT0EDG
PIE6
—
—
—
—
—
—
CCP2IE
CCP1IE
PIR6
—
—
—
—
—
—
CCP2IF
CCP1IF
IPR6
—
—
—
—
—
—
CCP2IP
CCP1IP
PMD3
—
—
—
—
PWM4MD
PWM3MD
CCP2MD
CCP1MD
CCPxCON
EN
—
OUT
FMT
MODE<3:0>
CCPxCAP
—
—
—
—
—
—
CTS<1:0>
CCPRxL
CCPRx<7:0>
CCPRxH
CCPRx<15:8>
CCPTMRS
P4TSEL<1:0>
P3TSEL<1:0>
C2TSEL<1:0>
C1TSEL<1:0>
CCPxPPS
—
—
—
CCPxPPS<4:0>
RxyPPS
—
—
—
RxyPPS<4:0>
T1CON
—
—
T1CKPS<1:0>
—
T1SYNC
T1RD16
TMR1ON
T1GCON
TMR1GE T1GPOL
T1GTM
T1GSPM T1GO/DONE
T1GVAL
—
—
T1CLK
—
—
—
—
CS<3:0>
T1GATE
—
—
—
—
GSS<3:0>
TMR1L
TMR1L7
TMR1L6
TMR1L5
TMR1L4
TMR1L3
TMR1L2
TMR1L1
TMR1L0
TMR1H
TMR1H7 TMR1H6 TMR1H5 TMR1H4
TMR1H3
TMR1H2
TMR1H1
TMR1H0
TMR2
TMR2<7:0>
T2PR
PR2<7:0>
T2CON
ON
CKPS<2:0>
OUTPS<3:0>
T2HLT
PSYNC
CPOL
CSYNC
MODE<4:0>
T2CLKCON
—
—
—
—
CS<3:0>
T2RST
—
—
—
—
RSEL<3:0>
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the CCP module.
Register
on Page
169
184
176
192
70
264
267
267
268
266
215
217
228
229
230
231
232
232
244
244
245
246
248
249
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 276