PIC18LF24K Datasheet, PDF (325/594 Pages) –

PIC18(L)F26/45/46K40
25.2 DSM Operation
The DSM module can be enabled by setting the MDEN
bit in the MDCON0 register. Clearing the MDEN bit in
the MDCON0 register, disables the DSM module out-
put and switches the carrier high and carrier low signals
to the default option of MDCARHPPS and
MDCARLPPS, respectively. The modulator signal
source is also switched to the MDBIT in the MDCON0
register. This not only assures that the DSM module is
inactive, but that it is also consuming the least amount
of current.
The values used to select the carrier high, carrier low,
and modulator sources held by the Modulation Source,
Modulation High Carrier, and Modulation Low Carrier
control registers are not affected when the MDEN bit is
cleared and the DSM module is disabled. The values
inside these registers remain unchanged while the
DSM is inactive. The sources for the carrier high, car-
rier low and modulator signals will once again be
selected when the MDEN bit is set and the DSM
module is again enabled and active.
The modulated output signal can be disabled without
shutting down the DSM module. The DSM module will
remain active and continue to mix signals, but the out-
put value will not be sent to the DSM pin. During the
time that the output is disabled, the DSM pin will remain
low. The modulated output can be disabled by clearing
the MDEN bit in the MDCON register.
25.3 Modulator Signal Sources
The modulator signal can be supplied from the follow-
ing sources:
• External signal on pin selected by MDSRCPPS
• MDBIT bit in the MDCON0 register
• CCP1/2 Output
• PWM3/4 Output
• Comparator C1/C2 Output
• EUSART RX Signal
• EUSART TX Signal
• MSSP SDO Signal (SPI Mode Only)
The modulator signal is selected by configuring the
MDSRCS<3:0> bits in the MDSRC register.
25.4 Carrier Signal Sources
The carrier high signal and carrier low signal can be
supplied from the following sources:
• External signal on pin selected by MDCARHPPS/
MDCARLPPS
• FOSC (system clock)
• HFINTOSC
• Reference Clock Module Signal
• CCP1/2 Output Signal
• PWM3/4 Output
The carrier high signal is selected by configuring the
MDCHS<2:0> bits in the MDCARH register. The carrier
low signal is selected by configuring the MDCLS<2:0>
bits in the MDCARL register.
25.5 Carrier Synchronization
During the time when the DSM switches between car-
rier high and carrier low signal sources, the carrier data
in the modulated output signal can become truncated.
To prevent this, the carrier signal can be synchronized
to the modulator signal. When synchronization is
enabled, the carrier pulse that is being mixed at the
time of the transition is allowed to transition low before
the DSM switches over to the next carrier source.
Synchronization is enabled separately for the carrier
high and carrier low signal sources. Synchronization for
the carrier high signal is enabled by setting the
MDCHSYNC bit in the MDCON1 register.
Synchronization for the carrier low signal is enabled by
setting the MDCLSYNC bit in the MDCON1 register.
Figure 25-2 through Figure 25-6 show timing diagrams
of using various synchronization methods.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 325