PIC18LF24K Datasheet, PDF (322/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 25-3: MDCARH: MODULATION HIGH CARRIER CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
R/W-0/0
R/W-0/0
—
—
—
—
—
CHS<2:0>⁽¹⁾
bit 7
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-3
bit 2-0
Unimplemented: Read as ‘0’
CHS<2:0>: Modulator Carrier High Selection bits⁽¹⁾
See Table 25-2 for signal list
Note 1:Unused selections provide an input value.
REGISTER 25-4: MDCARL: MODULATION LOW CARRIER CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
R/W-0/0
R/W-0/0
—
—
—
—
—
CLS<2:0>⁽¹⁾
bit 7
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-3
bit 2-0
Unimplemented: Read as ‘0’
CLS<2:0>: Modulator Carrier Low Input Selection bits⁽¹⁾
See Table 25-2 for signal list
Note 1:Unused selections provide a zero as the input value.
TABLE 25-2: MDCARH/MDCARL SELECTION MUX CONNECTIONS
MDCARH
MDCARL
CHS<2:0>
Connection
CLS<2:0>
Connection
111
7 ^{PWM4 OUT}
110
6 ^{PWM3 OUT}
101
5 ^{CCP2 OUT}
100
4 ^{CCP1 OUT}
011
3 ^{CLKREF output}
010
2 ^HFINTOSC
001
1 ^{FOSC (system clock)}
000
0 ^{Pin selected by MDCARHPPS}
111
7 ^{PWM4 OUT}
110
6 ^{PWM3 OUT}
101
5 ^{CCP2 OUT}
100
4 ^{CCP1 OUT}
011
3 ^{CLKREF output}
010
2 ^HFINTOSC
001
1 ^{FOSC (system clock)}
000
0 ^{Pin selected by MDCARLPPS}
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 322