PIC18LF24K Datasheet, PDF (182/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-14: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
TMR6IE
TMR5IE
TMR4IE
TMR3IE
bit 7
R/W-0/0
TMR2IE
R/W-0/0
TMR1IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR5IE: TMR5 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR4IE: TMR4 to PR4 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 182