PIC18LF24K Datasheet, PDF (95/594 Pages) –

PIC18(L)F26/45/46K40
FIGURE 10-1:
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
Return Address Stack <20:0>
Top-of-Stack Registers
TOSU
00h
TOSH
1Ah
TOSL
34h
Top-of-Stack
11111
11110
11101
001A34h
000D58h
00011
00010
00001
00000
Stack Pointer
STKPTR<4:0>
00010
10.1.2.2 Return Stack Pointer (STKPTR)
The STKPTR register (Register 10-1) contains the
Stack Pointer value. The STKOVF (Stack Overflow)
Status bit and the STKUNF (Stack Underflow) Status bit
can be accessed using the PCON0 register. The value
of the Stack Pointer can be 0 through 31. On Reset, the
Stack Pointer value will be zero. The user may read and
write the Stack Pointer value. This feature can be used
by a Real-Time Operating System (RTOS) for stack
maintenance. After the PC is pushed onto the stack 32
times (without popping any values off the stack), the
STKOVF bit is set. The STKOVF bit is cleared by soft-
ware or by a POR. The action that takes place when the
stack becomes full depends on the state of the
STVREN (Stack Overflow Reset Enable) Configuration
bit. (Refer to Section 3.1 “Configuration Words” for
a description of the device Configuration bits.)
If STVREN is set (default), a Reset will be generated
and a Stack Overflow will be indicated by the STKOVF
bit when the 32nd push is initiated. This includes CALL
and CALLW instructions, as well as stacking the return
address during an interrupt response. The STKOVF bit
will remain set and the Stack Pointer will be set to zero.
If STVREN is cleared, the STKOVF bit will be set on the
32nd push and the Stack Pointer will remain at 31 but
no Reset will occur. Any additional pushes will
overwrite the 31^st push but the STKPTR will remain at
31.
Setting STKOVF = 1 in software will change the bit, but
will not generate a Reset.
The STKUNF bit is set when a stack pop returns a
value of zero. The STKUNF bit is cleared by software
or by POR. The action that takes place when the stack
becomes full depends on the state of the STVREN
(Stack Overflow Reset Enable) Configuration bit.
(Refer to Section 3.1 “Configuration Words” for a
description of the device Configuration bits.)
If STVREN is set (default) and the stack has been
popped enough times to unload the stack, the next pop
will return a value of zero to the PC, it will set the
STKUNF bit and a Reset will be generated. This
condition can be generated by the RETURN, RETLW and
RETFIE instructions.
If STVREN is cleared, the STKUNF bit will be set, but
no Reset will occur.
When STVREN = 0, STKUNF will be set but no Reset
will occur.
Note:
Returning a value of zero to the PC on an
underflow has the effect of vectoring the
program to the Reset vector, where the
stack conditions can be verified and
appropriate actions can be taken. This is
not the same as a Reset, as the contents
of the SFRs are not affected.
10.1.2.3 PUSH and POP Instructions
Since the Top-of-Stack is readable and writable, the
ability to push values onto the stack and pull values off
the stack without disturbing normal program execution
is a desirable feature. The PIC18 instruction set
includes two instructions, PUSH and POP, that permit
the TOS to be manipulated under software control.
TOSU, TOSH and TOSL can be modified to place data
or a return address on the stack.
The PUSH instruction places the current PC value onto
the stack. This increments the Stack Pointer and loads
the current PC value onto the stack.
The POP instruction discards the current TOS by
decrementing the Stack Pointer. The previous value
pushed onto the stack then becomes the TOS value.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 95