PIC18LF24K Datasheet, PDF (72/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 7-6: PMD5: PMD CONTROL REGISTER 5
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0/0
—
—
—
—
—
—
—
DSMMD
bit 7
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7-1
bit 0
Unimplemented: Read as ‘0’
DSMMD: Disable Data Signal Modulator bit
1 = DSM module disabled
0 = DSM module enabled
TABLE 7-1: SUMMARY OF REGISTERS ASSOCIATED WITH PMD
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
PMD0 SYSCMD FVRMD HLVDMD CRCMD SCANMD NVMMD
PMD1
—
TMR6MD TMR5MD TMR4MD TMR3MD TMR2MD
PMD2
—
DACMD
ADCMD
—
—
CMP2MD
PMD3
—
—
—
—
PWM4MD PWM3MD
PMD4 UART2MD UART1MD MSSP2MD MSSP1MD
—
—
PMD5
—
—
—
—
—
—
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the PMD.
Bit 1
CLKRMD
TMR1MD
CMP1MD
CCP2MD
—
—
Bit 0
IOCMD
TMR0MD
ZCDMD
CCP1MD
CWG1MD
DSMMD
Register
on page
67
68
69
70
71
72
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 72