PIC18LF24K Datasheet, PDF (218/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 17-3: PPSLOCK: PPS LOCK REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0/0
—
—
—
—
—
—
—
PPSLOCKED
bit 7
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-1
bit 0
Unimplemented: Read as ‘0’
PPSLOCKED: PPS Locked bit
1 = PPS is locked. PPS selections can not be changed.
0 = PPS is not locked. PPS selections can be changed.
TABLE 17-2:
Name
PPSLOCK
INT0PPS
INT1PPS
INT2PPS
T0CKIPPS
T1CKIPPS
T1GPPS
T3CKIPPS
T3GPPS
T5CKIPPS
T5GPPS
T2INPPS
T4INPPS
T6INPPS
CCP1PPS
CCP2PPS
CWG1PPS
MDCARLPPS
MDCARHPPS
MDSRCPPS
ADACTPPS
SSP1CLKPPS
SSP1DATPPS
SSP1SSPPS
RX1PPS
TX1PPS
SSP2CLKPPS
SSP2DATPPS
SUMMARY OF REGISTERS ASSOCIATED WITH THE PPS MODULE
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
—
—
—
—
—
—
—
PPSLOCKED
—
—
—
INT0PPS<4:0>
—
—
—
INT1PPS<4:0>
—
—
—
INT2PPS<4:0>
—
—
—
T0CKIPPS<4:0>
—
—
—
T1CKIPPS<4:0>
—
—
—
T1GPPS<4:0>
—
—
—
T3CKIPPS<4:0>
—
—
—
T3GPPS<4:0>
—
—
—
T5CKIPPS<4:0>
—
—
—
T5GPPS<4:0>
—
—
—
T2INPPS<4:0>
—
—
—
T4INPPS<4:0>
—
—
—
T6INPPS<4:0>
—
—
—
CCP1PPS<4:0>
—
—
—
CCP2PPS<4:0>
—
—
—
CWG1PPS<4:0>
—
—
—
MDCARLPPS<4:0>
—
—
—
MDCARHPPS<4:0>
—
—
—
MDSRCPPS<4:0>
—
—
—
ADACTPPS<4:0>
—
—
—
SSP1CLKPPS<4:0>
—
—
—
SSP1DATPPS<4:0>
—
—
—
SSP1SSPPS<4:0>
—
—
—
RX1PPS<4:0>
—
—
—
TX1PPS<4:0>
—
—
—
SSP2CLKPPS<4:0>
—
—
—
SSP2DATPPS<4:0>
Register
on page
218
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
215
217
215
215
215
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 218