PIC18LF24K Datasheet, PDF (46/594 Pages) –

PIC18(L)F26/45/46K40
4.3.2.1 HFINTOSC
The High-Frequency Internal Oscillator (HFINTOSC) is
a precision digitally-controlled internal clock source
that produces a stable clock up to 64 MHz. The
HFINTOSC can be enabled through one of the
following methods:
• Programming the RSTOSC<2:0> bits in
Configuration Word 1 to ‘110’ (FOSC = 1 MHz) or
‘000’ (FOSC = 64 MHz) to set the oscillator upon
device Power-up or Reset.
• Write to the NOSC<2:0> bits of the OSCCON1
register during run-time. See Section 4.4 “Clock
Switching” for more information.
The HFINTOSC frequency can be selected by setting
the HFFRQ<3:0> bits of the OSCFRQ register.
The NDIV<3:0> bits of the OSCCON1 register allow for
division of the HFINTOSC output from a range between
1:1 and 1:512.
4.3.2.2 MFINTOSC
The module provides two (500 kHz and 31.25 kHz)
constant clock outputs. These clocks are digital
divisors of the HFINTOSC clock. Dynamic divider logic
is used to provide constant MFINTOSC clock rates for
all settings of HFINTOSC.
The MFINTOSC cannot be used to drive the system
but it is used to clock certain modules such as the
Timers and WWDT.
4.3.2.3
Internal Oscillator Frequency
Adjustment
The internal oscillator is factory-calibrated. This
internal oscillator can be adjusted in software by writing
to the OSCTUNE register (Register 4-3).
The default value of the OSCTUNE register is 00h. The
value is a 6-bit two’s complement number. A value of
1Fh will provide an adjustment to the maximum
frequency. A value of 20h will provide an adjustment to
the minimum frequency.
When the OSCTUNE register is modified, the oscillator
frequency will begin shifting to the new frequency. Code
execution continues during this shift. There is no
indication that the shift has occurred.
OSCTUNE does not affect the LFINTOSC frequency.
Operation of features that depend on the LFINTOSC
clock source frequency, such as the Power-up Timer
(PWRT), WWDT, Fail-Safe Clock Monitor (FSCM) and
peripherals, are not affected by the change in frequency.
4.3.2.4 LFINTOSC
The Low-Frequency Internal Oscillator (LFINTOSC) is
a factory-calibrated 31 kHz internal clock source.
The LFINTOSC is the frequency for the Power-up Timer
(PWRT), Windowed Watchdog Timer (WWDT) and
Fail-Safe Clock Monitor (FSCM).
The LFINTOSC is enabled through one of the following
methods:
• Programming the RSTOSC<2:0> bits of
Configuration Word 1 to enable LFINTOSC.
• Write to the NOSC<2:0> bits of the OSCCON1
register during run-time. See Section 4.4, Clock
Switching for more information.
4.3.2.5 ADCRC
The ADCRC is an oscillator dedicated to the ADC²
module. The ADCRC oscillator can be manually
enabled using the ADOEN bit of the OSCEN register.
The ADCRC runs at a fixed frequency of 600 kHz.
ADCRC is automatically enabled if it is selected as the
clock source for the ADC² module.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 46