PIC18LF24K Datasheet, PDF (222/594 Pages) –

PIC18(L)F26/45/46K40
18.3 Programmable Prescaler
A software programmable prescaler is available for
exclusive use with Timer0. There are 16 prescaler
options for Timer0 ranging in powers of two from 1:1 to
1:32768. The prescaler values are selected using the
T0CKPS<3:0> bits of the T0CON1 register.
The prescaler is not directly readable or writable.
Clearing the prescaler register can be done by writing
to the TMR0L register or the T0CON0, T0CON1
registers or by any Reset.
18.4 Programmable Postscaler
A software programmable postscaler (output divider) is
available for exclusive use with Timer0. There are 16
postscaler options for Timer0 ranging from 1:1 to 1:16.
The postscaler values are selected using the
T0OUTPS<3:0> bits of the T0CON0 register.
The postscaler is not directly readable or writable.
Clearing the postscaler register can be done by writing
to the TMR0L register or the T0CON0, T0CON1 regis-
ters or by any Reset.
18.5 Operation During Sleep
When operating synchronously, Timer0 will halt. When
operating asynchronously, Timer0 will continue to
increment and wake the device from Sleep (if Timer0
interrupts are enabled) provided that the input clock
source is active.
18.6 Timer0 Interrupts
The Timer0 interrupt flag bit (TMR0IF) is set when
either of the following conditions occur:
• 8-bit TMR0L matches the TMR0H value
• 16-bit TMR0 rolls over from ‘FFFFh’
When the postscaler bits (T0OUTPS<3:0>) are set to
1:1 operation (no division), the T0IF flag bit will be set
with every TMR0 match or rollover. In general, the
TMR0IF flag bit will be set every T0OUTPS +1 matches
or rollovers.
If Timer0 interrupts are enabled (TMR0IE bit of the
PIE0 register = ‘1’), the CPU will be interrupted and the
device may wake from Sleep (see Section
18.2 “Clock Source Selection” for more details).
18.7 Timer0 Output
The Timer0 output can be routed to any I/O pin via the
RxyPPS output selection register (see Section
17.0 “Peripheral Pin Select (PPS) Module” for addi-
tional information). The Timer0 output can also be used
by other peripherals, such as the auto-conversion trig-
ger of the Analog-to-Digital Converter. Finally, the
Timer0 output can be monitored through software via
the Timer0 output bit (T0OUT) of the T0CON0 register
(Register 18-1).
TMR0_out will be a pulse of one postscaled clock
period when a match occurs between TMR0L and PR0
(Period register for TMR0) in 8-bit mode, or when
TMR0 rolls over in 16-bit mode. The Timer0 output is a
50% duty cycle that toggles on each TMR0_out rising
clock edge.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 222