PIC18LF24K Datasheet, PDF (117/594 Pages) –

PIC18(L)F26/45/46K40
10.5 Register Definitions: Status
REGISTER 10-2: STATUS: STATUS REGISTER
U-0
R-1/q
R-1/q
R/W-0/u
—
TO
PD
N
bit 7
R/W-0/u
OV
R/W-0/u
Z
R/W-0/u
DC
R/W-0/u
C
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
TO: Time-Out bit
1 = Set at power-up or by execution of CLRWDT or SLEEP instruction
0 = A WDT time-out occurred
bit 5
PD: Power-Down bit
1 = Set at power-up or by execution of CLRWDT instruction
0 = Set by execution of the SLEEP instruction
bit 4
N: Negative bit used for signed arithmetic (2’s complement); indicates if the result is negative,
(ALU MSb = 1).
1 = The result is negative
0 = The result is positive
bit 3
OV: Overflow bit used for signed arithmetic (2’s complement); indicates an overflow of the 7-bit
magnitude, which causes the sign bit (bit 7) to change state.
1 = Overflow occurred for current signed arithmetic operation
0 = No overflow occurred
bit 2
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
bit 1
DC: Digit Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)⁽¹⁾
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
bit 0
C: Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)^(1,2)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Note 1: For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the
second operand.
2: For Rotate (RRF, RLF) instructions, this bit is loaded with either the high or low-order bit of the Source
register.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 117