PIC18LF24K Datasheet, PDF (539/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 37-2: SUPPLY CURRENT (IDD)^(1,2,4)
PIC18LF26/45/46K40
Standard Operating Conditions (unless otherwise stated)
PIC18F26/45/46K40
Param.
No.
Symbol
Device Characteristics
Min. Typ.† Max. Units
VDD
Conditions
Note
D100 IDDXT4
XT = 4 MHz
— 450 650 A 3.0V
D100 IDDXT4
XT = 4 MHz
— 550 750 A 3.0V
D100A IDDXT4
XT = 4 MHz
— 310 — A 3.0V PMD’s all 1’s
D100A IDDXT4
XT = 4 MHz
— 410 — A 3.0V PMD’s all 1’s
D101 IDDHFO16
HFINTOSC = 16 MHz
— 1.9 2.6 mA 3.0V
D101 IDDHFO16
HFINTOSC = 16 MHz
— 2.0 2.7 mA 3.0V
D101A IDDHFO16 HFINTOSC = 16 MHz
— 1.4 — mA 3.0V PMD’s all 1’s
D101A IDDHFO16 HFINTOSC = 16 MHz
— 1.5 — mA 3.0V PMD’s all 1’s
D102 IDDHFOPLL HFINTOSC = 64 MHz
— 7.4 9.4 mA 3.0V
D102 IDDHFOPLL HFINTOSC = 64 MHz
— 7.5 9.5 mA 3.0V
D102A IDDHFOPLL HFINTOSC = 64 MHz
— 5.2 — mA 3.0V PMD’s all 1’s
D102A IDDHFOPLL HFINTOSC = 64 MHz
— 5.3 — mA 3.0V PMD’s all 1’s
D103 IDDHSPLL32 HS+PLL = 64 MHz
— 6.9 8.9 mA 3.0V
D103 IDDHSPLL32 HS+PLL = 64 MHz
— 7.0 9.0 mA 3.0V
D103A IDDHSPLL32 HS+PLL = 64 MHz
— 4.9 — mA 3.0V PMD’s all 1’s
D103A IDDHSPLL32 HS+PLL = 64 MHz
— 5.0 — mA 3.0V PMD’s all 1’s
D104 IDDIDLE
IDLE mode, HFINTOSC = 16 MHz
— 1.05 — mA 3.0V
D104 IDDIDLE
IDLE mode, HFINTOSC = 16 MHz
— 1.15 — mA 3.0V
D105 IDDDOZE⁽³⁾ DOZE mode, HFINTOSC = 16 MHz, Doze Ratio = 16 — 1.1 — mA 3.0V
D105 IDDDOZE⁽³⁾ DOZE mode, HFINTOSC = 16 MHz, Doze Ratio = 16 — 1.2 — mA 3.0V
† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1: The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from
rail-to-rail; all I/O pins are outputs driven low; MCLR = VDD; WDT disabled.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switch-
ing rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption.
3: IDDDOZE = [IDDIDLE*(N-1)/N] + IDDHFO16/N where N = DOZE Ratio (Register 6-2).
4: PMD bits are all in the default state, no modules are disabled.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 539