PIC18LF24K Datasheet, PDF (299/594 Pages) –

PIC18(L)F26/45/46K40
24.2.4 STEERING MODES
In both Synchronous and Asynchronous Steering
modes, the modulated input signal can be steered to
any combination of four CWG outputs and a fixed-value
will be presented on all the outputs not used for the
PWM output. Each output has independent polarity,
steering, and shutdown options. Dead-band control is
not used in either steering mode.
When STRx = 0 (Register 24-5), then the
corresponding pin is held at the level defined by DATx
(Register 24-5). When STRx = 1, then the pin is driven
by the modulated input signal.
The POLx bits (Register 24-2) control the signal
polarity only when STRx = 1.
The CWG auto-shutdown operation also applies to
steering modes as described in Section
24.14 “Register Definitions: CWG Control”.
24.2.4.1 Synchronous Steering Mode
In Synchronous Steering mode (MODE<2:0>
bits = 001, Register 24-1), changes to steering
selection registers take effect on the next rising edge of
the modulated data input (Figure 24-9). In
Synchronous Steering mode, the output will always
produce a complete waveform.
Note: Only the STRx bits are synchronized; the
SDATx (data) bits are not synchronized.
The CWG auto-shutdown operation also applies in
Steering modes as described in Section 24.10 “Auto-
Shutdown””. An auto-shutdown event will only affect
pins that have STRx = 1.
FIGURE 24-9:
EXAMPLE OF SYNCHRONOUS STEERING (MODE<2:0> = 001)
CWG1
clock
Input
source
CWG1A
CWG1B
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 299