PIC18LF24K Datasheet, PDF (77/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 8-1: BOR OPERATING MODES
BOREN<1:0> SBOREN Device Mode BOR Mode
11
X
X
Active
Awake
Active
10
X
Sleep
Hibernate
1
01
0
00
X
X
Active
X
Hibernate
X
Disabled
Instruction Execution upon:
Release of POR
Wake-up from Sleep
Wait for release of BOR
(BORRDY = 1)
Wait for release of BOR
(BORRDY = 1)
Begins immediately
N/A
N/A
Wait for release of BOR
(BORRDY = 1)
Wait for release of BOR
(BORRDY = 1)
Begins immediately
Begins immediately
FIGURE 8-3:
BROWN-OUT SITUATIONS
VDD
VBOR
Internal
Reset
TPWRT⁽¹⁾
VDD
VBOR
Internal
Reset
< TPWRT _TPWRT(1)
VDD
Internal
Reset
TPWRT⁽¹⁾
Note 1: TPWRT delay only if PWRTE bit is programmed to ‘0’.
VBOR
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 77