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PIC18LF24K Datasheet, PDF (269/594 Pages) –
PIC18(L)F26/45/46K40
21.3 Capture Mode
Capture mode makes use of the 16-bit Timer1
resource. When an event occurs on the capture
source, the 16-bit CCPRxH:CCPRxL register pair
captures and stores the 16-bit value of the
TMRxH:TMRxL register pair, respectively. An event is
defined as one of the following and is configured by the
MODE<3:0> bits of the CCPxCON register:
• Every falling edge of CCPx input
• Every rising edge of CCPx input
• Every 4th rising edge of CCPx input
• Every 16th rising edge of CCPx input
• Every edge of CCPx input (rising or falling)
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIR6 register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH:CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value.
Note:
If an event occurs during a 2-byte read,
the high and low-byte data will be from
different events. It is recommended while
reading the CCPRxH:CCPRxL register
pair to either disable the module or read
the register pair twice for data integrity.
Figure 21-1 shows a simplified diagram of the capture
operation.
21.3.1 CAPTURE SOURCES
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
Note:
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
The capture source is selected by configuring the
CTS<1:0> bits of the CCPxCAP register. The following
sources can be selected:
• Pin selected by CCPxPPS
• C1_output
• C2_output
• IOC_interrupt
21.3.2 TIMER1 MODE RESOURCE
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
• See Section 19.0 “Timer1/3/5 Module with Gate
Control” for more information on configuring
Timer1.
FIGURE 21-1:
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCPxCTS<1:0>
IOC_interrupt
11
C2OUT_sink
10
C1OUT_sink
01
PPS
00
CCPxPPS
Prescaler
1,4,16
and
Edge Detect
set ccpxif
CCPxMODE<3:0>
RxyPPS
PPS
CCPx
TRIS Control
CCPRxH CCPRxL
16
16
TMR1H TMR1L
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 269