PIC18LF24K Datasheet, PDF (296/594 Pages) –

PIC18(L)F26/45/46K40
FIGURE 24-6:
SIMPLIFIED CWG BLOCK DIAGRAM (FORWARD AND REVERSE FULL-BRIDGE
MODES)
MODE<2:0> = 010: Forward
MODE<2:0> = 011: Reverse
LSAC<1:0>
CWG Clock
Rising Dead-Band Block
clock
signal out
signal in
MODE<2:0>
DQ
CWG
Q
Data
CWG
Data
cwg data
CWG Clock
signal in
signal out
clock
Falling Dead-Band Block
‘1’ 00
‘0’ 01
High-Z 10
11
CWG Data A
POLA
LSBD<1:0>
‘1’ 00
‘0’ 01
High-Z ¹⁰
11
CWG Data Input
DQ
E
CWG Data
CWG Data B
POLB
LSAC<1:0>
Rev. 10-000212C
8/7/2015
1
0 CWG1A
1
0 CWG1B
EN
SHUTDOWN = 1
AS0E
PPS
CWG1PPS
AS1E
TMR2_postscaled
AS2E
TMR4_postscaled
AS3E
TMR6_postscaled
AS4E
CMP1OUT
AS5E
CMP2OUT
REN
SHUTDOWN = 0
Auto-
shutdown
source
‘1’ 00
‘0’ 01
High-Z 10
11
CWG Data C
POLC
LSBD<1:0>
SQ
R
SHUTDOWN
FREEZE
CWG Data D
POLD
‘1’ 00
‘0’ 01
High-Z 10
11
CWG Data
DQ
1
0 CWG1C
1
0 CWG1D
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 296