PIC18LF24K Datasheet, PDF (263/594 Pages) –

PIC18(L)F26/45/46K40
21.0 CAPTURE/COMPARE/PWM
MODULE
The Capture/Compare/PWM module is a peripheral
that allows the user to time and control different events,
and to generate Pulse-Width Modulation (PWM)
signals. In Capture mode, the peripheral allows the
timing of the duration of an event. The Compare mode
allows the user to trigger an external event when a
predetermined amount of time has expired. The PWM
mode can generate Pulse-Width Modulated signals of
varying frequency and duty cycle.
This family of devices contains two standard
Capture/Compare/PWM modules (CCP1 and CCP2).
Each individual CCP module can select the timer
source that controls the module. Each module has an
independent timer selection which can be accessed
using the CxTSEL bits in the CCPTMRS register
(Register 21-2). The default timer selection is TMR1
when using Capture/Compare mode and TMR2 when
using PWM mode in the CCPx module.
Please note that the Capture/Compare mode operation
is described with respect to TMR1 and the PWM mode
operation is described with respect to TMR2 in the
following sections.
The Capture and Compare functions are identical for all
CCP modules.
Note 1: In devices with more than one CCP
module, it is very important to pay close
attention to the register names used. A
number placed after the module acronym
is used to distinguish between separate
modules. For example, the CCP1CON
and CCP2CON control the same
operational aspects of two completely
different CCP modules.
2: Throughout this section, generic
references to a CCP module in any of its
operating modes may be interpreted as
being equally applicable to CCPx module.
Register names, module signals, I/O pins,
and bit names may use the generic
designator ‘x’ to indicate the use of a
numeral to distinguish a particular module,
when required.
21.1 CCP Module Configuration
Each Capture/Compare/PWM module is associated
with a control register (CCPxCON), a capture input
selection register (CCPxCAP) and a data register
(CCPRx). The data register, in turn, is comprised of two
8-bit registers: CCPRxL (low byte) and CCPRxH (high
byte).
21.1.1
CCP MODULES AND TIMER
RESOURCES
The CCP modules utilize Timers 1 through 6 that vary
with the selected mode. Various timers are available to
the CCP modules in Capture, Compare or PWM
modes, as shown in Table 21-1.
TABLE 21-1:
CCP Mode
Capture
Compare
PWM
CCP MODE – TIMER
RESOURCE
Timer Resource
Timer1, Timer3 or Timer5
Timer2, Timer4 or Timer6
The assignment of a particular timer to a module is
determined by the timer to CCP enable bits in the
CCPTMRS register (see Register 21-2) All of the
modules may be active at once and may share the
same timer resource if they are configured to operate
in the same mode (Capture/Compare or PWM) at the
same time.
21.1.2 OPEN-DRAIN OUTPUT OPTION
When operating in Output mode (the Compare or PWM
modes), the drivers for the CCPx pins can be optionally
configured as open-drain outputs. This feature allows
the voltage level on the pin to be pulled to a higher level
through an external pull-up resistor and allows the
output to communicate with external circuits without the
need for additional level shifters.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 263