PIC18LF24K Datasheet, PDF (180/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-12: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
R/W-0/0
R/W-0/0
U-0
U-0
U-0
U-0
HLVDIE
ZCDIE
—
—
—
—
bit 7
R/W-0/0
C2IE
R/W-0/0
C1IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-2
bit 1
bit 0
HLVDIE: HLVD Interrupt Enable bit
1 = Enabled
0 = Disabled
ZCDIE: Zero-Cross Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
C2IE: Comparator 2 Interrupt Enable bit
1 = Enabled
0 = Disabled
C1IE: Comparator 1 Interrupt Enable bit
1 = Enabled
0 = Disabled
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 180