PIC18LF24K Datasheet, PDF (547/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 37-8: INTERNAL OSCILLATOR PARAMETERS⁽¹⁾
Standard Operating Conditions (unless otherwise stated)
Param
No.
Sym.
Characteristic
Min. Typ† Max. Units
Conditions
OS50 FHFOSC Precision Calibrated HFINTOSC —
4
— MHz (Note 2)
Frequency
8
12
16
32
64
OS51 FHFOSCLP Low-Power Optimized HFINTOSC —
1
— MHz
Frequency
—
2
— MHz
OS52 FMFOSC
Internal Calibrated MFINTOSC
Frequency
— 500 — kHz
OS53* FLFOSC Internal LFINTOSC Frequency
— 31 — kHz
OS54* THFOSCST HFINTOSC
Wake-up from Sleep Start-up
Time
— 11 20 s VREGPM = 0
— 50 — s VREGPM = 1
OS56 TLFOSCST LFINTOSC
— 0.2 — ms
Wake-up from Sleep Start-up Time
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to
the device as possible. 0.1 F and 0.01 F values in parallel are recommended.
2: See Figure 37-6: Precision Calibrated HFINTOSC Frequency Accuracy Over Device VDD and Tempera-
ture.
FIGURE 37-6:
PRECISION CALIBRATED HFINTOSC FREQUENCY ACCURACY OVER DEVICE
VDD AND TEMPERATURE
125
± 5%
85
± 3%
60
± 2%
0
-40
1.8 2.0
2.3
± 5%
3.0
3.5
4.0
4.5
5.0
5.5
VDD (V)
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 547