PIC18LF24K Datasheet, PDF (106/594 Pages) –

PIC18(L)F26/45/46K40
TABLE 10-5: REGISTER FILE SUMMARY FOR PIC18(L)F26/45/46K40 DEVICES
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
FFFh
TOSU
—
—
—
Top of Stack Upper byte (TOS<20:16>)
FFEh
TOSH
Top of Stack High byte (TOS<15:8>)
FFDh
TOSL
Top of Stack Low byte (TOS<7:0>)
FFCh
STKPTR
—
—
—
STKPTR<4:0>
FFBh
PCLATU
—
—
—
Holding Register for PC<20:16>
FFAh
PCLATH
Holding Register for PC<15:8>
FF9h
PCL
PC Low byte (PC<7:0>)
FF8h
TBLPTRU
—
—
Program Memory Table Pointer (TBLPTR<21:16>)
FF7h
TBLPTRH
Program Memory Table Pointer (TBLPTR<15:8>)
FF6h
TBLPTRL
Program Memory Table Pointer (TBLPTR<7:0>)
FF5h
TABLAT
TABLAT
FF4h
PRODH
Product Register High byte
FF3h
PRODL
Product Register Low byte
FF2h
INTCON
GIE/GIEH PEIE/GIEL
IPEN
—
—
INT2EDG INT1EDG INT0EDG
FF1h
—
Unimplemented
FF0h
—
Unimplemented
FEFh
INDF0
Uses contents of FSR0 to address data memory – value of FSR0 not changed (not a physical register)
FEEh
POSTINC0
Uses contents of FSR0 to address data memory – value of FSR0 post-incremented (not a physical register)
FEDh POSTDEC0
Uses contents of FSR0 to address data memory – value of FSR0 post-decremented (not a physical register)
FECh PREINC0
Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register)
FEBh
FEAh
PLUSW0
FSR0H
Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) – value of
FSR0 offset by W
—
—
—
—
Indirect Data Memory Address Pointer 0 High
FE9h
FSR0L
Indirect Data Memory Address Pointer 0 Low
FE8h
WREG
Working Register
FE7h
INDF1
Uses contents of FSR0 to address data memory – value of FSR1 not changed (not a physical register)
FE6h
POSTINC1
Uses contents of FSR0 to address data memory – value of FSR1 post-incremented (not a physical register)
FE5h
POSTDEC1
Uses contents of FSR0 to address data memory – value of FSR1 post-decremented (not a physical register)
FE4h
PREINC1
Uses contents of FSR0 to address data memory – value of FSR1 pre-incremented (not a physical register)
FE3h
PLUSW1
Uses contents of FSR0 to address data memory – value of FSR1 pre-incremented (not a physical register) – value of
FSR0 offset by W
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
Not available on LF devices.
Not available on PIC18(L)F26K40 (28-pin variants).
Not available on PIC18(L)F45K40 devices.
Value on
POR, BOR
---xxxxx
xxxxxxxx
xxxxxxxx
--000000
---00000
00000000
00000000
--000000
00000000
00000000
00000000
xxxxxxxx
xxxxxxxx
000--111
—
—
--------
--------
--------
--------
--------
----xxxx
xxxxxxxx
xxxxxxxx
--------
--------
--------
--------
--------
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 106