PIC18LF24K Datasheet, PDF (306/594 Pages) –

PIC18(L)F26/45/46K40
24.10 Auto-Shutdown
Auto-shutdown is a method to immediately override the
CWG output levels with specific overrides that allow for
safe shutdown of the circuit. The shutdown state can be
either cleared automatically or held until cleared by
software. The auto-shutdown circuit is illustrated in
Figure 24-14.
24.10.1 SHUTDOWN
The shutdown state can be entered by either of the
following two methods:
• Software generated
• External Input
24.10.1.1 Software Generated Shutdown
Setting the SHUTDOWN bit of the CWG1AS0 register
will force the CWG into the shutdown state.
When the auto-restart is disabled, the shutdown state
will persist as long as the SHUTDOWN bit is set.
When auto-restart is enabled, the SHUTDOWN bit will
clear automatically and resume operation on the next
rising edge event. The SHUTDOWN bit indicates when
a shutdown condition exists. The bit may be set or
cleared in software or by hardware.
24.10.1.2 External Input Source
External shutdown inputs provide the fastest way to safely
suspend CWG operation in the event of a Fault condition.
When any of the selected shutdown inputs goes active,
the CWG outputs will immediately go to the selected over-
ride levels without software delay. The override levels are
selected by the LSBD<1:0> and LSAC<1:0> bits of the
CWG1AS0 register (Register 24-6). Several input
sources can be selected to cause a shutdown condition.
All input sources are active-low. The sources are:
• Pin selected by CWG1PPS
• Timer2 post-scaled output
• Timer4 post-scaled output
• Timer6 post-scaled output
• Comparator 1 output
• Comparator 2 output
Shutdown input sources are individually enabled by the
ASxE bits of the CWG1AS1 register (Register 24-7).
Note:
Shutdown inputs are level sensitive, not
edge sensitive. The shutdown state can-
not be cleared, except by disabling auto-
shutdown, as long as the shutdown input
level persists.
24.10.1.3 Pin Override Levels
The levels driven to the CWG outputs during an auto-
shutdown event are controlled by the LSBD<1:0> and
LSAC<1:0> bits of the CWG1AS0 register
(Register 24-6). The LSBD<1:0> bits control CWG1B/
D output levels, while the LSAC<1:0> bits control the
CWG1A/C output levels.
24.10.1.4 Auto-Shutdown Interrupts
When an auto-shutdown event occurs, either by soft-
ware or hardware setting SHUTDOWN, the CWG1IF
flag bit of the PIR7 register is set (Register 14-5).
24.11 Auto-Shutdown Restart
After an auto-shutdown event has occurred, there are
two ways to resume operation:
• Software controlled
• Auto-restart
In either case, the shut-down source must be cleared
before the restart can take place. That is, either the
shutdown condition must be removed, or the
corresponding ASxE bit must be cleared.
24.11.1 SOFTWARE-CONTROLLED
RESTART
If the REN bit of the CWG1AS0 register is clear
(REN = 0), the CWG module must be restarted after an
auto-shutdown event through software.
Once all auto-shutdown sources are removed, the
software must clear SHUTDOWN. Once SHUTDOWN
is cleared, the CWG module will resume operation
upon the first rising edge of the CWG data input.
Note:
The SHUTDOWN bit cannot be cleared in
software if the auto-shutdown condition is
still present.
24.11.2 AUTO-RESTART
If the REN bit of the CWG1AS0 register is set (REN = 1),
the CWG module will restart from the shutdown state
automatically.
Once all auto-shutdown conditions are removed, the
hardware will automatically clear SHUTDOWN. Once
SHUTDOWN is cleared, the CWG module will resume
operation upon the first rising edge of the CWG data
input.
Note:
The SHUTDOWN bit cannot be cleared in
software if the auto-shutdown condition is
still present.
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 306