PIC18LF24K Datasheet, PDF (287/594 Pages) –

PIC18(L)F26/45/46K40
23.2 ZCD Logic Output
The ZCD module includes a Status bit, which can be
read to determine whether the current source or sink is
active. The ZCDOUT bit of the ZCDCON register is set
when the current sink is active, and cleared when the
current source is active. The ZCDOUT bit is affected by
the polarity bit.
The ZCDOUT signal can also be used as input to other
modules. This is controlled by the registers of the
corresponding module. ZCDOUT can be used as
follows:
• Gate source for TMR1/3/5
• Clock source for TMR2/4/6
• Reset source for TMR2/4/6
23.3 ZCD Logic Polarity
The ZCDPOL bit of the ZCDCON register inverts the
ZCDOUT bit relative to the current source and sink
output. When the ZCDPOL bit is set, a ZCDOUT high
indicates that the current source is active, and a low
output indicates that the current sink is active.
The ZCDPOL bit affects the ZCD interrupts.
23.4 ZCD Interrupts
An interrupt will be generated upon a change in the
ZCD logic output when the appropriate interrupt
enables are set. A rising edge detector and a falling
edge detector are present in the ZCD for this purpose.
The ZCDIF bit of the PIR2 register will be set when
either edge detector is triggered and its associated
enable bit is set. The ZCDINTP enables rising edge
interrupts and the ZCDINTN bit enables falling edge
interrupts. Both are located in the ZCDCON register.
Priority of the interrupt can be changed if the IPEN bit
of the INTCON register is set. The ZCD interrupt can be
made high or low priority by setting or clearing the
ZCDIP bit of the IPR2 register.
To fully enable the interrupt, the following bits must be set:
• ZCDIE bit of the PIE2 register
• ZCDINTP bit of the ZCDCON register
(for a rising edge detection)
• ZCDINTN bit of the ZCDCON register
(for a falling edge detection)
• PEIE and GIE bits of the INTCON register
Changing the ZCDPOL bit will cause an interrupt,
regardless of the level of the ZCDSEN bit.
The ZCDIF bit of the PIR2 register must be cleared in
software as part of the interrupt service. If another edge
is detected while this flag is being cleared, the flag will
still be set at the end of the sequence.
23.5 Correcting for VCPINV offset
The actual voltage at which the ZCD switches is the
reference voltage at the non-inverting input of the ZCD
op amp. For external voltage source waveforms other
than square waves, this voltage offset from zero
causes the zero-cross event to occur either too early or
too late. When the waveform is varying relative to VSS,
then the zero cross is detected too early as the
waveform falls and too late as the waveform rises.
When the waveform is varying relative to VDD, then the
zero cross is detected too late as the waveform rises
and too early as the waveform falls. The actual offset
time can be determined for sinusoidal waveforms with
the corresponding equations shown in Equation 23-2.
EQUATION 23-2: ZCD EVENT OFFSET
When External Voltage Source is relative to Vss:
asin


V_--V---C_-P--P_-E--I_-A-N_--K--V_{-}
TOFFSET = ------2---_-----_----_F----_r---_e---_q-------
When External Voltage Source is relative to VDD:
asin


V_-----D_---D_{-V---–-P--}V_-E---C_A---P_K----I_--N_---V_{--}
TOFFSET = -------------2---_-----_----_F----_r---_e---_q--------------
This offset time can be compensated for by adding a
pull-up or pull-down biasing resistor to the ZCD pin. A
pull-up resistor is used when the external voltage
source is varying relative to VSS. A pull-down resistor is
used when the voltage is varying relative to VDD. The
resistor adds a bias to the ZCD pin so that the target
external voltage source must go to zero to pull the pin
voltage to the VCPINV switching voltage. The pull-up or
pull-down value can be determined with the equations
shown in Equation 23-3 or Equation 23-4.
EQUATION 23-3: ZCD PULL-UP/DOWN
When External Signal is relative to Vss:
RPULLUP
=
R_-----S_--E_---R_---I_--E_---S_--_---V_----P_---U_---L_---L_---U_----P_{----–----}V_-----C_---P_----I_--N_----V_----
VCPINV
When External Signal is relative to VDD:
RPULLDOWN
=
-^R----^S--^E---^R---^I--^E---^S--^---^V----^C----^P----^I--^N----^V----^
VDD – VCPINV
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 287