PIC18LF24K Datasheet, PDF (192/594 Pages) –

PIC18(L)F26/45/46K40
REGISTER 14-24: IPR6: PERIPHERAL INTERRUPT PRIORITY REGISTER 6
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
bit 7
R/W-1/1
CCP2IP
R/W-1/1
CCP1IP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-2
bit 1
bit 0
Unimplemented: Read as ‘0’
CCP2IP: ECCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: ECCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
 2016 Microchip Technology Inc.
Preliminary
DS40001816C-page 192